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<a href="#define-members">Macros</a> &#124;
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<div class="title">xdevcfg_hw.h File Reference</div>  </div>
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Macros</h2></td></tr>
<tr class="memitem:ga40ccdd2b121359e65b1f95e5f32be3d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga40ccdd2b121359e65b1f95e5f32be3d8">XDCFG_DMA_INVALID_ADDRESS</a>&#160;&#160;&#160;0xFFFFFFFF</td></tr>
<tr class="memdesc:ga40ccdd2b121359e65b1f95e5f32be3d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalid DMA address.  <a href="group__devcfg.html#ga40ccdd2b121359e65b1f95e5f32be3d8">More...</a><br/></td></tr>
<tr class="separator:ga40ccdd2b121359e65b1f95e5f32be3d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2830ab27372d4841a56ae22b06aa1f9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga2830ab27372d4841a56ae22b06aa1f9a">XDCFG_UNLOCK_DATA</a>&#160;&#160;&#160;0x757BDF0D</td></tr>
<tr class="memdesc:ga2830ab27372d4841a56ae22b06aa1f9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">First APB access data.  <a href="group__devcfg.html#ga2830ab27372d4841a56ae22b06aa1f9a">More...</a><br/></td></tr>
<tr class="separator:ga2830ab27372d4841a56ae22b06aa1f9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaadcf2bdbe1acce8ab95b0466da519088"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaadcf2bdbe1acce8ab95b0466da519088">XDCFG_BASE_ADDRESS</a>&#160;&#160;&#160;0xF8007000</td></tr>
<tr class="memdesc:gaadcf2bdbe1acce8ab95b0466da519088"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device Config base address.  <a href="group__devcfg.html#gaadcf2bdbe1acce8ab95b0466da519088">More...</a><br/></td></tr>
<tr class="separator:gaadcf2bdbe1acce8ab95b0466da519088"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf9a1d48578faa2caf085c0d8d7f48897"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaf9a1d48578faa2caf085c0d8d7f48897">XDCFG_CONFIG_RESET_VALUE</a>&#160;&#160;&#160;0x508</td></tr>
<tr class="memdesc:gaf9a1d48578faa2caf085c0d8d7f48897"><td class="mdescLeft">&#160;</td><td class="mdescRight">Config reg reset value.  <a href="group__devcfg.html#gaf9a1d48578faa2caf085c0d8d7f48897">More...</a><br/></td></tr>
<tr class="separator:gaf9a1d48578faa2caf085c0d8d7f48897"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga77561dc2e9ea13137f50a8193b8fbcd3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>(BaseAddr, RegOffset)&#160;&#160;&#160;Xil_In32((BaseAddr) + (RegOffset))</td></tr>
<tr class="memdesc:ga77561dc2e9ea13137f50a8193b8fbcd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the given register.  <a href="group__devcfg.html#ga77561dc2e9ea13137f50a8193b8fbcd3">More...</a><br/></td></tr>
<tr class="separator:ga77561dc2e9ea13137f50a8193b8fbcd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ae617fbb2b3e148a8b2489e90fbdea3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>(BaseAddr, RegOffset, Data)&#160;&#160;&#160;Xil_Out32((BaseAddr) + (RegOffset), (Data))</td></tr>
<tr class="memdesc:ga8ae617fbb2b3e148a8b2489e90fbdea3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write to the given register.  <a href="group__devcfg.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">More...</a><br/></td></tr>
<tr class="separator:ga8ae617fbb2b3e148a8b2489e90fbdea3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Register Map</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>Offsets of registers from the start of the device </p>
</div></td></tr>
<tr class="memitem:ga31ebfed655e59d8ee204b253e04ee024"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:ga31ebfed655e59d8ee204b253e04ee024"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control Register.  <a href="group__devcfg.html#ga31ebfed655e59d8ee204b253e04ee024">More...</a><br/></td></tr>
<tr class="separator:ga31ebfed655e59d8ee204b253e04ee024"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad126a845b17979d640cd2dd00eab29f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gad126a845b17979d640cd2dd00eab29f9">XDCFG_LOCK_OFFSET</a>&#160;&#160;&#160;0x04</td></tr>
<tr class="memdesc:gad126a845b17979d640cd2dd00eab29f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lock Register.  <a href="group__devcfg.html#gad126a845b17979d640cd2dd00eab29f9">More...</a><br/></td></tr>
<tr class="separator:gad126a845b17979d640cd2dd00eab29f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3fafe11b95af8da04f385c9313a6958b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga3fafe11b95af8da04f385c9313a6958b">XDCFG_CFG_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:ga3fafe11b95af8da04f385c9313a6958b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configuration Register.  <a href="group__devcfg.html#ga3fafe11b95af8da04f385c9313a6958b">More...</a><br/></td></tr>
<tr class="separator:ga3fafe11b95af8da04f385c9313a6958b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5abc2123bae0a1d3512d41be98ca477c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga5abc2123bae0a1d3512d41be98ca477c">XDCFG_INT_STS_OFFSET</a>&#160;&#160;&#160;0x0C</td></tr>
<tr class="memdesc:ga5abc2123bae0a1d3512d41be98ca477c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Status Register.  <a href="group__devcfg.html#ga5abc2123bae0a1d3512d41be98ca477c">More...</a><br/></td></tr>
<tr class="separator:ga5abc2123bae0a1d3512d41be98ca477c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15552ab3878c35ec94749ebed5247fe5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga15552ab3878c35ec94749ebed5247fe5">XDCFG_INT_MASK_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:ga15552ab3878c35ec94749ebed5247fe5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Mask Register.  <a href="group__devcfg.html#ga15552ab3878c35ec94749ebed5247fe5">More...</a><br/></td></tr>
<tr class="separator:ga15552ab3878c35ec94749ebed5247fe5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6646b7874a5c9cc7bcdba6072bb4ff72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga6646b7874a5c9cc7bcdba6072bb4ff72">XDCFG_STATUS_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:ga6646b7874a5c9cc7bcdba6072bb4ff72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status Register.  <a href="group__devcfg.html#ga6646b7874a5c9cc7bcdba6072bb4ff72">More...</a><br/></td></tr>
<tr class="separator:ga6646b7874a5c9cc7bcdba6072bb4ff72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18c6f2aab3a27da352296a1324ed73b4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga18c6f2aab3a27da352296a1324ed73b4">XDCFG_DMA_SRC_ADDR_OFFSET</a>&#160;&#160;&#160;0x18</td></tr>
<tr class="memdesc:ga18c6f2aab3a27da352296a1324ed73b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Source Address Register.  <a href="group__devcfg.html#ga18c6f2aab3a27da352296a1324ed73b4">More...</a><br/></td></tr>
<tr class="separator:ga18c6f2aab3a27da352296a1324ed73b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24e1d08d2aa66c6fe2a8be9086ef9a41"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga24e1d08d2aa66c6fe2a8be9086ef9a41">XDCFG_DMA_DEST_ADDR_OFFSET</a>&#160;&#160;&#160;0x1C</td></tr>
<tr class="memdesc:ga24e1d08d2aa66c6fe2a8be9086ef9a41"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Destination Address Reg.  <a href="group__devcfg.html#ga24e1d08d2aa66c6fe2a8be9086ef9a41">More...</a><br/></td></tr>
<tr class="separator:ga24e1d08d2aa66c6fe2a8be9086ef9a41"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaf9fa64a65762a428ba36bd38a80ab80"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaaf9fa64a65762a428ba36bd38a80ab80">XDCFG_DMA_SRC_LEN_OFFSET</a>&#160;&#160;&#160;0x20</td></tr>
<tr class="memdesc:gaaf9fa64a65762a428ba36bd38a80ab80"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Source Transfer Length.  <a href="group__devcfg.html#gaaf9fa64a65762a428ba36bd38a80ab80">More...</a><br/></td></tr>
<tr class="separator:gaaf9fa64a65762a428ba36bd38a80ab80"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaffc13cbb412f77e54b0ecf2f25e205ee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaffc13cbb412f77e54b0ecf2f25e205ee">XDCFG_DMA_DEST_LEN_OFFSET</a>&#160;&#160;&#160;0x24</td></tr>
<tr class="memdesc:gaffc13cbb412f77e54b0ecf2f25e205ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Destination Transfer.  <a href="group__devcfg.html#gaffc13cbb412f77e54b0ecf2f25e205ee">More...</a><br/></td></tr>
<tr class="separator:gaffc13cbb412f77e54b0ecf2f25e205ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga895856e5cf4578a328a12bb0f0287826"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga895856e5cf4578a328a12bb0f0287826">XDCFG_ROM_SHADOW_OFFSET</a>&#160;&#160;&#160;0x28</td></tr>
<tr class="memdesc:ga895856e5cf4578a328a12bb0f0287826"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA ROM Shadow Register.  <a href="group__devcfg.html#ga895856e5cf4578a328a12bb0f0287826">More...</a><br/></td></tr>
<tr class="separator:ga895856e5cf4578a328a12bb0f0287826"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59">XDCFG_MULTIBOOT_ADDR_OFFSET</a>&#160;&#160;&#160;0x2C</td></tr>
<tr class="memdesc:gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multi BootAddress Pointer.  <a href="group__devcfg.html#gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59">More...</a><br/></td></tr>
<tr class="separator:gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad56285ef89202c084bad1724cc3f8df1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gad56285ef89202c084bad1724cc3f8df1">XDCFG_SW_ID_OFFSET</a>&#160;&#160;&#160;0x30</td></tr>
<tr class="memdesc:gad56285ef89202c084bad1724cc3f8df1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software ID Register.  <a href="group__devcfg.html#gad56285ef89202c084bad1724cc3f8df1">More...</a><br/></td></tr>
<tr class="separator:gad56285ef89202c084bad1724cc3f8df1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7dfcf6697edba5f229b22fc33d614363"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga7dfcf6697edba5f229b22fc33d614363">XDCFG_UNLOCK_OFFSET</a>&#160;&#160;&#160;0x34</td></tr>
<tr class="memdesc:ga7dfcf6697edba5f229b22fc33d614363"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unlock Register.  <a href="group__devcfg.html#ga7dfcf6697edba5f229b22fc33d614363">More...</a><br/></td></tr>
<tr class="separator:ga7dfcf6697edba5f229b22fc33d614363"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80ad10863ac12916d347046e8263f5b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga80ad10863ac12916d347046e8263f5b2">XDCFG_MCTRL_OFFSET</a>&#160;&#160;&#160;0x80</td></tr>
<tr class="memdesc:ga80ad10863ac12916d347046e8263f5b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Miscellaneous Control Reg.  <a href="group__devcfg.html#ga80ad10863ac12916d347046e8263f5b2">More...</a><br/></td></tr>
<tr class="separator:ga80ad10863ac12916d347046e8263f5b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Control Register Bit definitions</div></td></tr>
<tr class="memitem:gac111c754b7a79aba4ad9d66beeaaddc8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gac111c754b7a79aba4ad9d66beeaaddc8">XDCFG_CTRL_FORCE_RST_MASK</a>&#160;&#160;&#160;0x80000000</td></tr>
<tr class="memdesc:gac111c754b7a79aba4ad9d66beeaaddc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Force into Secure Reset.  <a href="group__devcfg.html#gac111c754b7a79aba4ad9d66beeaaddc8">More...</a><br/></td></tr>
<tr class="separator:gac111c754b7a79aba4ad9d66beeaaddc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b2100592757335d946e0466f84adcf9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga6b2100592757335d946e0466f84adcf9">XDCFG_CTRL_PCFG_PROG_B_MASK</a>&#160;&#160;&#160;0x40000000</td></tr>
<tr class="memdesc:ga6b2100592757335d946e0466f84adcf9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Program signal to Reset FPGA.  <a href="group__devcfg.html#ga6b2100592757335d946e0466f84adcf9">More...</a><br/></td></tr>
<tr class="separator:ga6b2100592757335d946e0466f84adcf9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac7e72bf0cbb6551a2f74abfd265e6619"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gac7e72bf0cbb6551a2f74abfd265e6619">XDCFG_CTRL_PCFG_POR_CNT_4K_MASK</a>&#160;&#160;&#160;0x20000000</td></tr>
<tr class="memdesc:gac7e72bf0cbb6551a2f74abfd265e6619"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control PL POR timer.  <a href="group__devcfg.html#gac7e72bf0cbb6551a2f74abfd265e6619">More...</a><br/></td></tr>
<tr class="separator:gac7e72bf0cbb6551a2f74abfd265e6619"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac84a7176f99dc0e1d66a53673053228"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaac84a7176f99dc0e1d66a53673053228">XDCFG_CTRL_PCAP_PR_MASK</a>&#160;&#160;&#160;0x08000000</td></tr>
<tr class="memdesc:gaac84a7176f99dc0e1d66a53673053228"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable PCAP for PR.  <a href="group__devcfg.html#gaac84a7176f99dc0e1d66a53673053228">More...</a><br/></td></tr>
<tr class="separator:gaac84a7176f99dc0e1d66a53673053228"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gade98fb162f4954144b33a71eb81a25e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gade98fb162f4954144b33a71eb81a25e3">XDCFG_CTRL_PCAP_MODE_MASK</a>&#160;&#160;&#160;0x04000000</td></tr>
<tr class="memdesc:gade98fb162f4954144b33a71eb81a25e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable PCAP.  <a href="group__devcfg.html#gade98fb162f4954144b33a71eb81a25e3">More...</a><br/></td></tr>
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<tr class="memitem:ga16cb1e4072240a97799a685fad35234f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga16cb1e4072240a97799a685fad35234f">XDCFG_CTRL_PCAP_RATE_EN_MASK</a>&#160;&#160;&#160;0x02000000</td></tr>
<tr class="memdesc:ga16cb1e4072240a97799a685fad35234f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable PCAP send data to FPGA every 4 PCAP cycles.  <a href="group__devcfg.html#ga16cb1e4072240a97799a685fad35234f">More...</a><br/></td></tr>
<tr class="separator:ga16cb1e4072240a97799a685fad35234f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae54ce392946a79ecb63fefc9f6087d57"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gae54ce392946a79ecb63fefc9f6087d57">XDCFG_CTRL_MULTIBOOT_EN_MASK</a>&#160;&#160;&#160;0x01000000</td></tr>
<tr class="memdesc:gae54ce392946a79ecb63fefc9f6087d57"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiboot Enable.  <a href="group__devcfg.html#gae54ce392946a79ecb63fefc9f6087d57">More...</a><br/></td></tr>
<tr class="separator:gae54ce392946a79ecb63fefc9f6087d57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2fb2e3f895a89aac522ba93e0697e078"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga2fb2e3f895a89aac522ba93e0697e078">XDCFG_CTRL_JTAG_CHAIN_DIS_MASK</a>&#160;&#160;&#160;0x00800000</td></tr>
<tr class="memdesc:ga2fb2e3f895a89aac522ba93e0697e078"><td class="mdescLeft">&#160;</td><td class="mdescRight">JTAG Chain Disable.  <a href="group__devcfg.html#ga2fb2e3f895a89aac522ba93e0697e078">More...</a><br/></td></tr>
<tr class="separator:ga2fb2e3f895a89aac522ba93e0697e078"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf49fc564c0c61b6511a171eb045e0a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gadf49fc564c0c61b6511a171eb045e0a5">XDCFG_CTRL_USER_MODE_MASK</a>&#160;&#160;&#160;0x00008000</td></tr>
<tr class="memdesc:gadf49fc564c0c61b6511a171eb045e0a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">User Mode Mask.  <a href="group__devcfg.html#gadf49fc564c0c61b6511a171eb045e0a5">More...</a><br/></td></tr>
<tr class="separator:gadf49fc564c0c61b6511a171eb045e0a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9a915bd47631afa6954dc306283b413"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gac9a915bd47631afa6954dc306283b413">XDCFG_CTRL_PCFG_AES_FUSE_MASK</a>&#160;&#160;&#160;0x00001000</td></tr>
<tr class="memdesc:gac9a915bd47631afa6954dc306283b413"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES key source.  <a href="group__devcfg.html#gac9a915bd47631afa6954dc306283b413">More...</a><br/></td></tr>
<tr class="separator:gac9a915bd47631afa6954dc306283b413"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaabe1c3e1a3156147fdd1716d063574c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaabe1c3e1a3156147fdd1716d063574c0">XDCFG_CTRL_PCFG_AES_EN_MASK</a>&#160;&#160;&#160;0x00000E00</td></tr>
<tr class="memdesc:gaabe1c3e1a3156147fdd1716d063574c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES Enable Mask.  <a href="group__devcfg.html#gaabe1c3e1a3156147fdd1716d063574c0">More...</a><br/></td></tr>
<tr class="separator:gaabe1c3e1a3156147fdd1716d063574c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac75c8af80babda8c6387d5b9f83e63b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gac75c8af80babda8c6387d5b9f83e63b5">XDCFG_CTRL_SEU_EN_MASK</a>&#160;&#160;&#160;0x00000100</td></tr>
<tr class="memdesc:gac75c8af80babda8c6387d5b9f83e63b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">SEU Enable Mask.  <a href="group__devcfg.html#gac75c8af80babda8c6387d5b9f83e63b5">More...</a><br/></td></tr>
<tr class="separator:gac75c8af80babda8c6387d5b9f83e63b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ad33e86575e803961abfaf7593907e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga3ad33e86575e803961abfaf7593907e7">XDCFG_CTRL_SEC_EN_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:ga3ad33e86575e803961abfaf7593907e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure/Non Secure Status mask.  <a href="group__devcfg.html#ga3ad33e86575e803961abfaf7593907e7">More...</a><br/></td></tr>
<tr class="separator:ga3ad33e86575e803961abfaf7593907e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga62d4f8110807f2ebbb148de931990a82"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga62d4f8110807f2ebbb148de931990a82">XDCFG_CTRL_SPNIDEN_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:ga62d4f8110807f2ebbb148de931990a82"><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure Non Invasive Debug Enable.  <a href="group__devcfg.html#ga62d4f8110807f2ebbb148de931990a82">More...</a><br/></td></tr>
<tr class="separator:ga62d4f8110807f2ebbb148de931990a82"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0bc4a40162eccf50446c13b41a5deae6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga0bc4a40162eccf50446c13b41a5deae6">XDCFG_CTRL_SPIDEN_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga0bc4a40162eccf50446c13b41a5deae6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure Invasive Debug Enable.  <a href="group__devcfg.html#ga0bc4a40162eccf50446c13b41a5deae6">More...</a><br/></td></tr>
<tr class="separator:ga0bc4a40162eccf50446c13b41a5deae6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaee65740fa83e66131a1b706844bbc368"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaee65740fa83e66131a1b706844bbc368">XDCFG_CTRL_NIDEN_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:gaee65740fa83e66131a1b706844bbc368"><td class="mdescLeft">&#160;</td><td class="mdescRight">Non-Invasive Debug Enable.  <a href="group__devcfg.html#gaee65740fa83e66131a1b706844bbc368">More...</a><br/></td></tr>
<tr class="separator:gaee65740fa83e66131a1b706844bbc368"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4cb6befced97425b6288e7f80a4cb882"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga4cb6befced97425b6288e7f80a4cb882">XDCFG_CTRL_DBGEN_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga4cb6befced97425b6288e7f80a4cb882"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invasive Debug Enable.  <a href="group__devcfg.html#ga4cb6befced97425b6288e7f80a4cb882">More...</a><br/></td></tr>
<tr class="separator:ga4cb6befced97425b6288e7f80a4cb882"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae013378d19bdbab0d16fddce8707f61f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gae013378d19bdbab0d16fddce8707f61f">XDCFG_CTRL_DAP_EN_MASK</a>&#160;&#160;&#160;0x00000007</td></tr>
<tr class="memdesc:gae013378d19bdbab0d16fddce8707f61f"><td class="mdescLeft">&#160;</td><td class="mdescRight">DAP Enable Mask.  <a href="group__devcfg.html#gae013378d19bdbab0d16fddce8707f61f">More...</a><br/></td></tr>
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<tr><td colspan="2"><div class="groupHeader">Lock register bit definitions</div></td></tr>
<tr class="memitem:gab3ad8e8bf58fb796d3b6359cf276a0eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gab3ad8e8bf58fb796d3b6359cf276a0eb">XDCFG_LOCK_AES_EFUSE_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:gab3ad8e8bf58fb796d3b6359cf276a0eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lock AES Efuse bit.  <a href="group__devcfg.html#gab3ad8e8bf58fb796d3b6359cf276a0eb">More...</a><br/></td></tr>
<tr class="separator:gab3ad8e8bf58fb796d3b6359cf276a0eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad4c541e7e72c1d43d9b5fd5aa8ae2c85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gad4c541e7e72c1d43d9b5fd5aa8ae2c85">XDCFG_LOCK_AES_EN_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:gad4c541e7e72c1d43d9b5fd5aa8ae2c85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lock AES_EN update.  <a href="group__devcfg.html#gad4c541e7e72c1d43d9b5fd5aa8ae2c85">More...</a><br/></td></tr>
<tr class="separator:gad4c541e7e72c1d43d9b5fd5aa8ae2c85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga245a296585dd3c08615b96a319e75026"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga245a296585dd3c08615b96a319e75026">XDCFG_LOCK_SEU_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga245a296585dd3c08615b96a319e75026"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lock SEU_En update.  <a href="group__devcfg.html#ga245a296585dd3c08615b96a319e75026">More...</a><br/></td></tr>
<tr class="separator:ga245a296585dd3c08615b96a319e75026"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7061616f307b1f98ab4b6945664333ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga7061616f307b1f98ab4b6945664333ad">XDCFG_LOCK_SEC_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga7061616f307b1f98ab4b6945664333ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lock SEC_EN and USER_MODE.  <a href="group__devcfg.html#ga7061616f307b1f98ab4b6945664333ad">More...</a><br/></td></tr>
<tr class="separator:ga7061616f307b1f98ab4b6945664333ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02c2ca7416d5d3f208a15ca865f33f40"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga02c2ca7416d5d3f208a15ca865f33f40">XDCFG_LOCK_DBG_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga02c2ca7416d5d3f208a15ca865f33f40"><td class="mdescLeft">&#160;</td><td class="mdescRight">This bit locks security config including: DAP_En, DBGEN,, NIDEN, SPNIEN.  <a href="group__devcfg.html#ga02c2ca7416d5d3f208a15ca865f33f40">More...</a><br/></td></tr>
<tr class="separator:ga02c2ca7416d5d3f208a15ca865f33f40"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Config Register Bit definitions</div></td></tr>
<tr class="memitem:ga3540b49682ec44e90f106532526cdf1d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga3540b49682ec44e90f106532526cdf1d">XDCFG_CFG_RFIFO_TH_MASK</a>&#160;&#160;&#160;0x00000C00</td></tr>
<tr class="memdesc:ga3540b49682ec44e90f106532526cdf1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read FIFO Threshold Mask.  <a href="group__devcfg.html#ga3540b49682ec44e90f106532526cdf1d">More...</a><br/></td></tr>
<tr class="separator:ga3540b49682ec44e90f106532526cdf1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga022faf83302e04ad191b6ee2c15ed282"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga022faf83302e04ad191b6ee2c15ed282">XDCFG_CFG_WFIFO_TH_MASK</a>&#160;&#160;&#160;0x00000300</td></tr>
<tr class="memdesc:ga022faf83302e04ad191b6ee2c15ed282"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write FIFO Threshold Mask.  <a href="group__devcfg.html#ga022faf83302e04ad191b6ee2c15ed282">More...</a><br/></td></tr>
<tr class="separator:ga022faf83302e04ad191b6ee2c15ed282"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e63502ef0cc6680e3630a9a0e57efa8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga1e63502ef0cc6680e3630a9a0e57efa8">XDCFG_CFG_RCLK_EDGE_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:ga1e63502ef0cc6680e3630a9a0e57efa8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read data active clock edge.  <a href="group__devcfg.html#ga1e63502ef0cc6680e3630a9a0e57efa8">More...</a><br/></td></tr>
<tr class="separator:ga1e63502ef0cc6680e3630a9a0e57efa8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga648711e2e48a1fa8feadf390f213c422"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga648711e2e48a1fa8feadf390f213c422">XDCFG_CFG_WCLK_EDGE_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:ga648711e2e48a1fa8feadf390f213c422"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write data active clock edge.  <a href="group__devcfg.html#ga648711e2e48a1fa8feadf390f213c422">More...</a><br/></td></tr>
<tr class="separator:ga648711e2e48a1fa8feadf390f213c422"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa667b16475c1b06aa123e3ea54237a65"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaa667b16475c1b06aa123e3ea54237a65">XDCFG_CFG_DISABLE_SRC_INC_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:gaa667b16475c1b06aa123e3ea54237a65"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable Source address increment mask.  <a href="group__devcfg.html#gaa667b16475c1b06aa123e3ea54237a65">More...</a><br/></td></tr>
<tr class="separator:gaa667b16475c1b06aa123e3ea54237a65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7dfcd2790e4eff2350b2c77e69bb0dbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga7dfcd2790e4eff2350b2c77e69bb0dbc">XDCFG_CFG_DISABLE_DST_INC_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga7dfcd2790e4eff2350b2c77e69bb0dbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable Destination address increment mask.  <a href="group__devcfg.html#ga7dfcd2790e4eff2350b2c77e69bb0dbc">More...</a><br/></td></tr>
<tr class="separator:ga7dfcd2790e4eff2350b2c77e69bb0dbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Interrupt Status/Mask Register Bit definitions</div></td></tr>
<tr class="memitem:gaa150109448e0dae4f63c97e8d4835ac4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaa150109448e0dae4f63c97e8d4835ac4">XDCFG_IXR_PSS_GTS_USR_B_MASK</a>&#160;&#160;&#160;0x80000000</td></tr>
<tr class="memdesc:gaa150109448e0dae4f63c97e8d4835ac4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tri-state IO during HIZ.  <a href="group__devcfg.html#gaa150109448e0dae4f63c97e8d4835ac4">More...</a><br/></td></tr>
<tr class="separator:gaa150109448e0dae4f63c97e8d4835ac4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad806a28b37776eb5714cca5e47ebf51a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gad806a28b37776eb5714cca5e47ebf51a">XDCFG_IXR_PSS_FST_CFG_B_MASK</a>&#160;&#160;&#160;0x40000000</td></tr>
<tr class="memdesc:gad806a28b37776eb5714cca5e47ebf51a"><td class="mdescLeft">&#160;</td><td class="mdescRight">First configuration done.  <a href="group__devcfg.html#gad806a28b37776eb5714cca5e47ebf51a">More...</a><br/></td></tr>
<tr class="separator:gad806a28b37776eb5714cca5e47ebf51a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaae0cdad7bf3b52dbf8fa6009492257e5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaae0cdad7bf3b52dbf8fa6009492257e5">XDCFG_IXR_PSS_GPWRDWN_B_MASK</a>&#160;&#160;&#160;0x20000000</td></tr>
<tr class="memdesc:gaae0cdad7bf3b52dbf8fa6009492257e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Global power down.  <a href="group__devcfg.html#gaae0cdad7bf3b52dbf8fa6009492257e5">More...</a><br/></td></tr>
<tr class="separator:gaae0cdad7bf3b52dbf8fa6009492257e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2850a459bed5fde0901bc16ae41fcf72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga2850a459bed5fde0901bc16ae41fcf72">XDCFG_IXR_PSS_GTS_CFG_B_MASK</a>&#160;&#160;&#160;0x10000000</td></tr>
<tr class="memdesc:ga2850a459bed5fde0901bc16ae41fcf72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tri-state IO during configuration.  <a href="group__devcfg.html#ga2850a459bed5fde0901bc16ae41fcf72">More...</a><br/></td></tr>
<tr class="separator:ga2850a459bed5fde0901bc16ae41fcf72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36eedd2831c6dae36cd432921d34b5f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga36eedd2831c6dae36cd432921d34b5f0">XDCFG_IXR_PSS_CFG_RESET_B_MASK</a>&#160;&#160;&#160;0x08000000</td></tr>
<tr class="memdesc:ga36eedd2831c6dae36cd432921d34b5f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">PL configuration reset.  <a href="group__devcfg.html#ga36eedd2831c6dae36cd432921d34b5f0">More...</a><br/></td></tr>
<tr class="separator:ga36eedd2831c6dae36cd432921d34b5f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf276d56385dd1326c99d5c70640458b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaf276d56385dd1326c99d5c70640458b8">XDCFG_IXR_AXI_WTO_MASK</a>&#160;&#160;&#160;0x00800000</td></tr>
<tr class="memdesc:gaf276d56385dd1326c99d5c70640458b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">AXI Write Address or Data or response timeout.  <a href="group__devcfg.html#gaf276d56385dd1326c99d5c70640458b8">More...</a><br/></td></tr>
<tr class="separator:gaf276d56385dd1326c99d5c70640458b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaebe4d8aa713686020c2df8ef52f52486"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaebe4d8aa713686020c2df8ef52f52486">XDCFG_IXR_AXI_WERR_MASK</a>&#160;&#160;&#160;0x00400000</td></tr>
<tr class="memdesc:gaebe4d8aa713686020c2df8ef52f52486"><td class="mdescLeft">&#160;</td><td class="mdescRight">AXI Write response error.  <a href="group__devcfg.html#gaebe4d8aa713686020c2df8ef52f52486">More...</a><br/></td></tr>
<tr class="separator:gaebe4d8aa713686020c2df8ef52f52486"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82b988804f908861e58f6c8409fb61dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga82b988804f908861e58f6c8409fb61dc">XDCFG_IXR_AXI_RTO_MASK</a>&#160;&#160;&#160;0x00200000</td></tr>
<tr class="memdesc:ga82b988804f908861e58f6c8409fb61dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">AXI Read Address or response timeout.  <a href="group__devcfg.html#ga82b988804f908861e58f6c8409fb61dc">More...</a><br/></td></tr>
<tr class="separator:ga82b988804f908861e58f6c8409fb61dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80a342c6002722176c408a91aa177bb2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga80a342c6002722176c408a91aa177bb2">XDCFG_IXR_AXI_RERR_MASK</a>&#160;&#160;&#160;0x00100000</td></tr>
<tr class="memdesc:ga80a342c6002722176c408a91aa177bb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">AXI Read response error.  <a href="group__devcfg.html#ga80a342c6002722176c408a91aa177bb2">More...</a><br/></td></tr>
<tr class="separator:ga80a342c6002722176c408a91aa177bb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd279fe5c6af5cb49cb22efe8487288b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gafd279fe5c6af5cb49cb22efe8487288b">XDCFG_IXR_RX_FIFO_OV_MASK</a>&#160;&#160;&#160;0x00040000</td></tr>
<tr class="memdesc:gafd279fe5c6af5cb49cb22efe8487288b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rx FIFO Overflow.  <a href="group__devcfg.html#gafd279fe5c6af5cb49cb22efe8487288b">More...</a><br/></td></tr>
<tr class="separator:gafd279fe5c6af5cb49cb22efe8487288b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d0f39a67ebecfe3208f90adb975c164"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga4d0f39a67ebecfe3208f90adb975c164">XDCFG_IXR_WR_FIFO_LVL_MASK</a>&#160;&#160;&#160;0x00020000</td></tr>
<tr class="memdesc:ga4d0f39a67ebecfe3208f90adb975c164"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tx FIFO less than threshold.  <a href="group__devcfg.html#ga4d0f39a67ebecfe3208f90adb975c164">More...</a><br/></td></tr>
<tr class="separator:ga4d0f39a67ebecfe3208f90adb975c164"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d2b8bff7a8acef986264a348153d7ec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga8d2b8bff7a8acef986264a348153d7ec">XDCFG_IXR_RD_FIFO_LVL_MASK</a>&#160;&#160;&#160;0x00010000</td></tr>
<tr class="memdesc:ga8d2b8bff7a8acef986264a348153d7ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rx FIFO greater than threshold.  <a href="group__devcfg.html#ga8d2b8bff7a8acef986264a348153d7ec">More...</a><br/></td></tr>
<tr class="separator:ga8d2b8bff7a8acef986264a348153d7ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd33fcf28c9438e3a23e21571e9cc196"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gadd33fcf28c9438e3a23e21571e9cc196">XDCFG_IXR_DMA_CMD_ERR_MASK</a>&#160;&#160;&#160;0x00008000</td></tr>
<tr class="memdesc:gadd33fcf28c9438e3a23e21571e9cc196"><td class="mdescLeft">&#160;</td><td class="mdescRight">Illegal DMA command.  <a href="group__devcfg.html#gadd33fcf28c9438e3a23e21571e9cc196">More...</a><br/></td></tr>
<tr class="separator:gadd33fcf28c9438e3a23e21571e9cc196"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga66dc8e74c39f3a79b9a4260d2e5064a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga66dc8e74c39f3a79b9a4260d2e5064a8">XDCFG_IXR_DMA_Q_OV_MASK</a>&#160;&#160;&#160;0x00004000</td></tr>
<tr class="memdesc:ga66dc8e74c39f3a79b9a4260d2e5064a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA command queue overflow.  <a href="group__devcfg.html#ga66dc8e74c39f3a79b9a4260d2e5064a8">More...</a><br/></td></tr>
<tr class="separator:ga66dc8e74c39f3a79b9a4260d2e5064a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga219beab8ecbdaa4e74c8d130b94e4ae0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga219beab8ecbdaa4e74c8d130b94e4ae0">XDCFG_IXR_DMA_DONE_MASK</a>&#160;&#160;&#160;0x00002000</td></tr>
<tr class="memdesc:ga219beab8ecbdaa4e74c8d130b94e4ae0"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA Command Done.  <a href="group__devcfg.html#ga219beab8ecbdaa4e74c8d130b94e4ae0">More...</a><br/></td></tr>
<tr class="separator:ga219beab8ecbdaa4e74c8d130b94e4ae0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae46a37df60109876c5f96d62dc6b9f78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gae46a37df60109876c5f96d62dc6b9f78">XDCFG_IXR_D_P_DONE_MASK</a>&#160;&#160;&#160;0x00001000</td></tr>
<tr class="memdesc:gae46a37df60109876c5f96d62dc6b9f78"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA and PCAP transfers Done.  <a href="group__devcfg.html#gae46a37df60109876c5f96d62dc6b9f78">More...</a><br/></td></tr>
<tr class="separator:gae46a37df60109876c5f96d62dc6b9f78"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga349dc6e8fe9e165ffaaf0329da6a3ca3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga349dc6e8fe9e165ffaaf0329da6a3ca3">XDCFG_IXR_P2D_LEN_ERR_MASK</a>&#160;&#160;&#160;0x00000800</td></tr>
<tr class="memdesc:ga349dc6e8fe9e165ffaaf0329da6a3ca3"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCAP to DMA transfer length error.  <a href="group__devcfg.html#ga349dc6e8fe9e165ffaaf0329da6a3ca3">More...</a><br/></td></tr>
<tr class="separator:ga349dc6e8fe9e165ffaaf0329da6a3ca3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84c13cf9502fdc6e4b5aca232322eebb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga84c13cf9502fdc6e4b5aca232322eebb">XDCFG_IXR_PCFG_HMAC_ERR_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:ga84c13cf9502fdc6e4b5aca232322eebb"><td class="mdescLeft">&#160;</td><td class="mdescRight">HMAC error mask.  <a href="group__devcfg.html#ga84c13cf9502fdc6e4b5aca232322eebb">More...</a><br/></td></tr>
<tr class="separator:ga84c13cf9502fdc6e4b5aca232322eebb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b85bf633686d74c21c9358be8497095"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga3b85bf633686d74c21c9358be8497095">XDCFG_IXR_PCFG_SEU_ERR_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga3b85bf633686d74c21c9358be8497095"><td class="mdescLeft">&#160;</td><td class="mdescRight">SEU Error mask.  <a href="group__devcfg.html#ga3b85bf633686d74c21c9358be8497095">More...</a><br/></td></tr>
<tr class="separator:ga3b85bf633686d74c21c9358be8497095"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafddabfd06735e901077dcb54ac83e23a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gafddabfd06735e901077dcb54ac83e23a">XDCFG_IXR_PCFG_POR_B_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:gafddabfd06735e901077dcb54ac83e23a"><td class="mdescLeft">&#160;</td><td class="mdescRight">FPGA POR mask.  <a href="group__devcfg.html#gafddabfd06735e901077dcb54ac83e23a">More...</a><br/></td></tr>
<tr class="separator:gafddabfd06735e901077dcb54ac83e23a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b2eef5103e50bb1dd8cb4b3abda13f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga3b2eef5103e50bb1dd8cb4b3abda13f0">XDCFG_IXR_PCFG_CFG_RST_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga3b2eef5103e50bb1dd8cb4b3abda13f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">FPGA Reset mask.  <a href="group__devcfg.html#ga3b2eef5103e50bb1dd8cb4b3abda13f0">More...</a><br/></td></tr>
<tr class="separator:ga3b2eef5103e50bb1dd8cb4b3abda13f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga39c7e70832ef5a30a251342bf831f088"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga39c7e70832ef5a30a251342bf831f088">XDCFG_IXR_PCFG_DONE_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga39c7e70832ef5a30a251342bf831f088"><td class="mdescLeft">&#160;</td><td class="mdescRight">Done Signal Mask.  <a href="group__devcfg.html#ga39c7e70832ef5a30a251342bf831f088">More...</a><br/></td></tr>
<tr class="separator:ga39c7e70832ef5a30a251342bf831f088"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa818ba9c2de5717835e855fba4756dce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaa818ba9c2de5717835e855fba4756dce">XDCFG_IXR_PCFG_INIT_PE_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gaa818ba9c2de5717835e855fba4756dce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Detect Positive edge of Init Signal.  <a href="group__devcfg.html#gaa818ba9c2de5717835e855fba4756dce">More...</a><br/></td></tr>
<tr class="separator:gaa818ba9c2de5717835e855fba4756dce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ae21c6f80c245ea0085c5e5645703f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga5ae21c6f80c245ea0085c5e5645703f1">XDCFG_IXR_PCFG_INIT_NE_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga5ae21c6f80c245ea0085c5e5645703f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Detect Negative edge of Init Signal.  <a href="group__devcfg.html#ga5ae21c6f80c245ea0085c5e5645703f1">More...</a><br/></td></tr>
<tr class="separator:ga5ae21c6f80c245ea0085c5e5645703f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga79c4878a47796227778f7dd479e9b140"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79c4878a47796227778f7dd479e9b140"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDCFG_IXR_ERROR_FLAGS_MASK</b></td></tr>
<tr class="separator:ga79c4878a47796227778f7dd479e9b140"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad6bf5c4e495b1d96bf28c350983ca608"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad6bf5c4e495b1d96bf28c350983ca608"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDCFG_IXR_ALL_MASK</b>&#160;&#160;&#160;0x00F7F8EF</td></tr>
<tr class="separator:gad6bf5c4e495b1d96bf28c350983ca608"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Status Register Bit definitions</div></td></tr>
<tr class="memitem:ga48a0c155d061c98656101cb19a87f0a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga48a0c155d061c98656101cb19a87f0a0">XDCFG_STATUS_DMA_CMD_Q_F_MASK</a>&#160;&#160;&#160;0x80000000</td></tr>
<tr class="memdesc:ga48a0c155d061c98656101cb19a87f0a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA command Queue full.  <a href="group__devcfg.html#ga48a0c155d061c98656101cb19a87f0a0">More...</a><br/></td></tr>
<tr class="separator:ga48a0c155d061c98656101cb19a87f0a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad26b8675cf6625f83b93e5d8f41f1065"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gad26b8675cf6625f83b93e5d8f41f1065">XDCFG_STATUS_DMA_CMD_Q_E_MASK</a>&#160;&#160;&#160;0x40000000</td></tr>
<tr class="memdesc:gad26b8675cf6625f83b93e5d8f41f1065"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA command Queue empty.  <a href="group__devcfg.html#gad26b8675cf6625f83b93e5d8f41f1065">More...</a><br/></td></tr>
<tr class="separator:gad26b8675cf6625f83b93e5d8f41f1065"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff5f9c1fa417a9544adf896282d205b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaff5f9c1fa417a9544adf896282d205b9">XDCFG_STATUS_DMA_DONE_CNT_MASK</a>&#160;&#160;&#160;0x30000000</td></tr>
<tr class="memdesc:gaff5f9c1fa417a9544adf896282d205b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of completed DMA transfers.  <a href="group__devcfg.html#gaff5f9c1fa417a9544adf896282d205b9">More...</a><br/></td></tr>
<tr class="separator:gaff5f9c1fa417a9544adf896282d205b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga78f9aed2cc9225155a3414f117519bf0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga78f9aed2cc9225155a3414f117519bf0">XDCFG_STATUS_RX_FIFO_LVL_MASK</a>&#160;&#160;&#160;0x01F000000</td></tr>
<tr class="memdesc:ga78f9aed2cc9225155a3414f117519bf0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rx FIFO level.  <a href="group__devcfg.html#ga78f9aed2cc9225155a3414f117519bf0">More...</a><br/></td></tr>
<tr class="separator:ga78f9aed2cc9225155a3414f117519bf0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5fafa4549ef417021328567aca7fa549"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga5fafa4549ef417021328567aca7fa549">XDCFG_STATUS_TX_FIFO_LVL_MASK</a>&#160;&#160;&#160;0x0007F000</td></tr>
<tr class="memdesc:ga5fafa4549ef417021328567aca7fa549"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tx FIFO level.  <a href="group__devcfg.html#ga5fafa4549ef417021328567aca7fa549">More...</a><br/></td></tr>
<tr class="separator:ga5fafa4549ef417021328567aca7fa549"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a8789bdbea24952f5301d75fcff272a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga3a8789bdbea24952f5301d75fcff272a">XDCFG_STATUS_PSS_GTS_USR_B</a>&#160;&#160;&#160;0x00000800</td></tr>
<tr class="memdesc:ga3a8789bdbea24952f5301d75fcff272a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tri-state IO during HIZ.  <a href="group__devcfg.html#ga3a8789bdbea24952f5301d75fcff272a">More...</a><br/></td></tr>
<tr class="separator:ga3a8789bdbea24952f5301d75fcff272a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8f00411613dddd1742c39696388c3fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gab8f00411613dddd1742c39696388c3fc">XDCFG_STATUS_PSS_FST_CFG_B</a>&#160;&#160;&#160;0x00000400</td></tr>
<tr class="memdesc:gab8f00411613dddd1742c39696388c3fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">First PL config done.  <a href="group__devcfg.html#gab8f00411613dddd1742c39696388c3fc">More...</a><br/></td></tr>
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<tr class="memitem:ga4fb070b786553db7ff88deadab2bb6cb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga4fb070b786553db7ff88deadab2bb6cb">XDCFG_STATUS_PSS_GPWRDWN_B</a>&#160;&#160;&#160;0x00000200</td></tr>
<tr class="memdesc:ga4fb070b786553db7ff88deadab2bb6cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Global power down.  <a href="group__devcfg.html#ga4fb070b786553db7ff88deadab2bb6cb">More...</a><br/></td></tr>
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<tr class="memitem:ga339bdad1a39196eaef22c9453f60a6f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga339bdad1a39196eaef22c9453f60a6f1">XDCFG_STATUS_PSS_GTS_CFG_B</a>&#160;&#160;&#160;0x00000100</td></tr>
<tr class="memdesc:ga339bdad1a39196eaef22c9453f60a6f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tri-state IO during config.  <a href="group__devcfg.html#ga339bdad1a39196eaef22c9453f60a6f1">More...</a><br/></td></tr>
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<tr class="memitem:ga7e4cdd2d6218376746d4f73232b1935d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga7e4cdd2d6218376746d4f73232b1935d">XDCFG_STATUS_SECURE_RST_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:ga7e4cdd2d6218376746d4f73232b1935d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure Reset POR Status.  <a href="group__devcfg.html#ga7e4cdd2d6218376746d4f73232b1935d">More...</a><br/></td></tr>
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<tr class="memitem:gad4508fc28f5b539b7214e239591809fd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gad4508fc28f5b539b7214e239591809fd">XDCFG_STATUS_ILLEGAL_APB_ACCESS_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:gad4508fc28f5b539b7214e239591809fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Illegal APB access.  <a href="group__devcfg.html#gad4508fc28f5b539b7214e239591809fd">More...</a><br/></td></tr>
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<tr class="memitem:ga1568dc0a278536df9687278619c74474"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga1568dc0a278536df9687278619c74474">XDCFG_STATUS_PSS_CFG_RESET_B</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga1568dc0a278536df9687278619c74474"><td class="mdescLeft">&#160;</td><td class="mdescRight">PL config reset status.  <a href="group__devcfg.html#ga1568dc0a278536df9687278619c74474">More...</a><br/></td></tr>
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<tr class="memitem:ga2adb521e9dab8223c16f2ebbfccc830f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga2adb521e9dab8223c16f2ebbfccc830f">XDCFG_STATUS_PCFG_INIT_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga2adb521e9dab8223c16f2ebbfccc830f"><td class="mdescLeft">&#160;</td><td class="mdescRight">FPGA Init Status.  <a href="group__devcfg.html#ga2adb521e9dab8223c16f2ebbfccc830f">More...</a><br/></td></tr>
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<tr class="memitem:gafb4c8340ab30a1cd2c683dd12c1e44eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gafb4c8340ab30a1cd2c683dd12c1e44eb">XDCFG_STATUS_EFUSE_BBRAM_KEY_DISABLE_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:gafb4c8340ab30a1cd2c683dd12c1e44eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">BBRAM key disable.  <a href="group__devcfg.html#gafb4c8340ab30a1cd2c683dd12c1e44eb">More...</a><br/></td></tr>
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<tr class="memitem:gacca94ac04133576c96fb1083d234638b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gacca94ac04133576c96fb1083d234638b">XDCFG_STATUS_EFUSE_SEC_EN_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:gacca94ac04133576c96fb1083d234638b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Efuse Security Enable Status.  <a href="group__devcfg.html#gacca94ac04133576c96fb1083d234638b">More...</a><br/></td></tr>
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<tr class="memitem:gaaabb6a4426bae09df68669a1bec2b769"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaaabb6a4426bae09df68669a1bec2b769">XDCFG_STATUS_EFUSE_JTAG_DIS_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gaaabb6a4426bae09df68669a1bec2b769"><td class="mdescLeft">&#160;</td><td class="mdescRight">EFuse JTAG Disable status.  <a href="group__devcfg.html#gaaabb6a4426bae09df68669a1bec2b769">More...</a><br/></td></tr>
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<tr><td colspan="2"><div class="groupHeader">DMA Source/Destination Transfer Length Register Bit definitions</div></td></tr>
<tr class="memitem:ga73f403fdc1d3a80ff519b9aa5d8902ff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga73f403fdc1d3a80ff519b9aa5d8902ff">XDCFG_DMA_LEN_MASK</a>&#160;&#160;&#160;0x7FFFFFF</td></tr>
<tr class="memdesc:ga73f403fdc1d3a80ff519b9aa5d8902ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Length Mask.  <a href="group__devcfg.html#ga73f403fdc1d3a80ff519b9aa5d8902ff">More...</a><br/></td></tr>
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<tr><td colspan="2"><div class="groupHeader">Miscellaneous Control Register Bit definitions</div></td></tr>
<tr class="memitem:gade09d0c3fb076a8e0849d9a6acddef46"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gade09d0c3fb076a8e0849d9a6acddef46">XDCFG_MCTRL_PCAP_PS_VERSION_MASK</a>&#160;&#160;&#160;0xF0000000</td></tr>
<tr class="memdesc:gade09d0c3fb076a8e0849d9a6acddef46"><td class="mdescLeft">&#160;</td><td class="mdescRight">PS Version Mask.  <a href="group__devcfg.html#gade09d0c3fb076a8e0849d9a6acddef46">More...</a><br/></td></tr>
<tr class="separator:gade09d0c3fb076a8e0849d9a6acddef46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2578e62e3b1e6e9783f523779c6d8323"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga2578e62e3b1e6e9783f523779c6d8323">XDCFG_MCTRL_PCAP_PS_VERSION_SHIFT</a>&#160;&#160;&#160;28</td></tr>
<tr class="memdesc:ga2578e62e3b1e6e9783f523779c6d8323"><td class="mdescLeft">&#160;</td><td class="mdescRight">PS Version Shift.  <a href="group__devcfg.html#ga2578e62e3b1e6e9783f523779c6d8323">More...</a><br/></td></tr>
<tr class="separator:ga2578e62e3b1e6e9783f523779c6d8323"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5d7d25bc3d66e24bce45553e863b731"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaa5d7d25bc3d66e24bce45553e863b731">XDCFG_MCTRL_PCAP_LPBK_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:gaa5d7d25bc3d66e24bce45553e863b731"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCAP loopback mask.  <a href="group__devcfg.html#gaa5d7d25bc3d66e24bce45553e863b731">More...</a><br/></td></tr>
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<tr><td colspan="2"><div class="groupHeader">FIFO Threshold Bit definitions</div></td></tr>
<tr class="memitem:gaec5cdaff00256c1b1fcbb1fd4cefbd57"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#gaec5cdaff00256c1b1fcbb1fd4cefbd57">XDCFG_CFG_FIFO_QUARTER</a>&#160;&#160;&#160;0x0</td></tr>
<tr class="memdesc:gaec5cdaff00256c1b1fcbb1fd4cefbd57"><td class="mdescLeft">&#160;</td><td class="mdescRight">Quarter empty.  <a href="group__devcfg.html#gaec5cdaff00256c1b1fcbb1fd4cefbd57">More...</a><br/></td></tr>
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<tr class="memitem:ga6d3a835786acfb7c150a51fea707af4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga6d3a835786acfb7c150a51fea707af4e">XDCFG_CFG_FIFO_HALF</a>&#160;&#160;&#160;0x1</td></tr>
<tr class="memdesc:ga6d3a835786acfb7c150a51fea707af4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Half empty.  <a href="group__devcfg.html#ga6d3a835786acfb7c150a51fea707af4e">More...</a><br/></td></tr>
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<tr class="memitem:ga302649f2eccc0c208558a667eeb3d31b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga302649f2eccc0c208558a667eeb3d31b">XDCFG_CFG_FIFO_3QUARTER</a>&#160;&#160;&#160;0x2</td></tr>
<tr class="memdesc:ga302649f2eccc0c208558a667eeb3d31b"><td class="mdescLeft">&#160;</td><td class="mdescRight">3/4 empty  <a href="group__devcfg.html#ga302649f2eccc0c208558a667eeb3d31b">More...</a><br/></td></tr>
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<tr class="memitem:ga4d79fa4095c652f0aaccc1eef6f11a3b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga4d79fa4095c652f0aaccc1eef6f11a3b">XDCFG_CFG_FIFO_EMPTY</a>&#160;&#160;&#160;0x4</td></tr>
<tr class="memdesc:ga4d79fa4095c652f0aaccc1eef6f11a3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Empty.  <a href="group__devcfg.html#ga4d79fa4095c652f0aaccc1eef6f11a3b">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga995fb32dbac8a7899c9be66a8bf7d3d1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw</a> (u32 BaseAddr)</td></tr>
<tr class="memdesc:ga995fb32dbac8a7899c9be66a8bf7d3d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function perform the reset sequence to the given devcfg interface by configuring the appropriate control bits in the devcfg specifc registers the devcfg reset squence involves the following steps Disable all the interuupts Clear the status Update relevant config registers with reset values Disbale the looopback mode and pcap rate enable.  <a href="group__devcfg.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">More...</a><br/></td></tr>
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